Marisa López Vallejo


General information:

Information as group member:

Main Research Lines

  • Variation-aware Design

              Sensing and monitioring PVT variations, Modeling, Design of Reliable Circuits, Rad-Hard Design and Simulation.

  • Low Power Design

              Design and study of low power digital circuits. Power consumption evaluation and estimation. Power optimization by means                 of hardware and software techniques.

  • VLSI Systems Design

    Specification, verification and design of digital circuits. Design methodologies. Special Architectures for Communication Applications

  • Computer Architecture

    Application Specific Instruction-Set Processors (ASIPs), Special architectures targeting low power.

  • System-level Design Automation

             Hardware-Software Co-design, Embedded Systems Co-Synthesis, Hardware-Software Partitioning, Scheduling, System-level                Specification. Reconfigurable Systems.


+34915495700 ext. 4218



Postal address:

Departamento de Ingeniería Electrónica
E.T.S.I. Telecomunicación
Universidad Politécnica de Madrid
Avda. Complutense nº 30, 28040
Room C.230